|部署・役職名||Memory Design Engineer and Manager|
＊SRAM architecture design
＊Read and write critical path design and analysis
＊Design of key building blocks （sensing, analog, high voltage, DFT）
＊Chip－level design verification
＊Embedded non－volatile memory compiler and productization
＊Co－work with product/reliability engineer on silicon characterization and reliability qualification
【必須（MUST）】＊The candidates should have at least bachelor degree with 10 years of experiences, master degree with 3 years of experience or PhD degree in relevant field.
＊Memory experts in the field of SRAM.
＊Familiar with bit cell characteristics （Vmin, bit cell performance, write margin）, sense amplifier design, high sigma variation analysis, race check, margin signoff.
＊Knowledge on high speed and low Vmin design is a plus.
＊English is a plus
＊Self－motivated in learning and problem－solving
＊ Good communication skill and a good team player
＊ Strong ownership and commitment